File: /Users/paulross/dev/linux/linux-3.13/arch/x86/include/asm/io.h

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       1: #ifndef _ASM_X86_IO_H
       2: #define _ASM_X86_IO_H
       3: 
       4: /*
       5:  * This file contains the definitions for the x86 IO instructions
       6:  * inb/inw/inl/outb/outw/outl and the "string versions" of the same
       7:  * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
       8:  * versions of the single-IO instructions (inb_p/inw_p/..).
       9:  *
      10:  * This file is not meant to be obfuscating: it's just complicated
      11:  * to (a) handle it all in a way that makes gcc able to optimize it
      12:  * as well as possible and (b) trying to avoid writing the same thing
      13:  * over and over again with slight variations and possibly making a
      14:  * mistake somewhere.
      15:  */
      16: 
      17: /*
      18:  * Thanks to James van Artsdalen for a better timing-fix than
      19:  * the two short jumps: using outb's to a nonexistent port seems
      20:  * to guarantee better timings even on fast machines.
      21:  *
      22:  * On the other hand, I'd like to be sure of a non-existent port:
      23:  * I feel a bit unsafe about using 0x80 (should be safe, though)
      24:  *
      25:  *        Linus
      26:  */
      27: 
      28:  /*
      29:   *  Bit simplified and optimized by Jan Hubicka
      30:   *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
      31:   *
      32:   *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
      33:   *  isa_read[wl] and isa_write[wl] fixed
      34:   *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
      35:   */
      36: 
      37: #define ARCH_HAS_IOREMAP_WC
      38: 
      39: #include <linux/string.h>
      40: #include <linux/compiler.h>
      41: #include <asm/page.h>
      42: 
      43: #define build_mmio_read(name, size, type, reg, barrier) \
      44: static inline type name(const volatile void __iomem *addr) \
      45: { type ret; asm volatile("mov" size " %1,%0":reg (ret) \
      46: :"m" (*(volatile type __force *)addr) barrier); return ret; }
      47: 
      48: #define build_mmio_write(name, size, type, reg, barrier) \
      49: static inline void name(type val, volatile void __iomem *addr) \
      50: { asm volatile("mov" size " %0,%1": :reg (val), \
      51: "m" (*(volatile type __force *)addr) barrier); }
      52: 
      53: build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
      54: build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
      55: build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
      56: 
      57: build_mmio_read(__readb, "b", unsigned char, "=q", )
      58: build_mmio_read(__readw, "w", unsigned short, "=r", )
      59: build_mmio_read(__readl, "l", unsigned int, "=r", )
      60: 
      61: build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
      62: build_mmio_write(writew, "w", unsigned short, "r", :"memory")
      63: build_mmio_write(writel, "l", unsigned int, "r", :"memory")
      64: 
      65: build_mmio_write(__writeb, "b", unsigned char, "q", )
      66: build_mmio_write(__writew, "w", unsigned short, "r", )
      67: build_mmio_write(__writel, "l", unsigned int, "r", )
      68: 
      69: #define readb_relaxed(a) __readb(a)
      70: #define readw_relaxed(a) __readw(a)
      71: #define readl_relaxed(a) __readl(a)
      72: #define __raw_readb __readb
      73: #define __raw_readw __readw
      74: #define __raw_readl __readl
      75: 
      76: #define __raw_writeb __writeb
      77: #define __raw_writew __writew
      78: #define __raw_writel __writel
      79: 
      80: #define mmiowb() barrier()
      81: 
      82: #ifdef CONFIG_X86_64
      83: 
      84: build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
      85: build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
      86: 
      87: #define readq_relaxed(a)    readq(a)
      88: 
      89: #define __raw_readq(a)        readq(a)
      90: #define __raw_writeq(val, addr)    writeq(val, addr)
      91: 
      92: /* Let people know that we have them */
      93: #define readq            readq
      94: #define writeq            writeq
      95: 
      96: #endif
      97: 
      98: /**
      99:  *    virt_to_phys    -    map virtual addresses to physical
     100:  *    @address: address to remap
     101:  *
     102:  *    The returned physical address is the physical (CPU) mapping for
     103:  *    the memory address given. It is only valid to use this function on
     104:  *    addresses directly mapped or allocated via kmalloc.
     105:  *
     106:  *    This function does not give bus mappings for DMA transfers. In
     107:  *    almost all conceivable cases a device driver should not be using
     108:  *    this function
     109:  */
     110: 
     111: static inline phys_addr_t virt_to_phys(volatile void *address)
     112: {
     113:     return __pa(address);
     114: }
     115: 
     116: /**
     117:  *    phys_to_virt    -    map physical address to virtual
     118:  *    @address: address to remap
     119:  *
     120:  *    The returned virtual address is a current CPU mapping for
     121:  *    the memory address given. It is only valid to use this function on
     122:  *    addresses that have a kernel mapping
     123:  *
     124:  *    This function does not handle bus mappings for DMA transfers. In
     125:  *    almost all conceivable cases a device driver should not be using
     126:  *    this function
     127:  */
     128: 
     129: static inline void *phys_to_virt(phys_addr_t address)
     130: {
     131:     return __va(address);
     132: }
     133: 
     134: /*
     135:  * Change "struct page" to physical address.
     136:  */
     137: #define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
     138: 
     139: /*
     140:  * ISA I/O bus memory addresses are 1:1 with the physical address.
     141:  * However, we truncate the address to unsigned int to avoid undesirable
     142:  * promitions in legacy drivers.
     143:  */
     144: static inline unsigned int isa_virt_to_bus(volatile void *address)
     145: {
     146:     return (unsigned int)virt_to_phys(address);
     147: }
     148: #define isa_page_to_bus(page)    ((unsigned int)page_to_phys(page))
     149: #define isa_bus_to_virt        phys_to_virt
     150: 
     151: /*
     152:  * However PCI ones are not necessarily 1:1 and therefore these interfaces
     153:  * are forbidden in portable PCI drivers.
     154:  *
     155:  * Allow them on x86 for legacy drivers, though.
     156:  */
     157: #define virt_to_bus virt_to_phys
     158: #define bus_to_virt phys_to_virt
     159: 
     160: /**
     161:  * ioremap     -   map bus memory into CPU space
     162:  * @offset:    bus address of the memory
     163:  * @size:      size of the resource to map
     164:  *
     165:  * ioremap performs a platform specific sequence of operations to
     166:  * make bus memory CPU accessible via the readb/readw/readl/writeb/
     167:  * writew/writel functions and the other mmio helpers. The returned
     168:  * address is not guaranteed to be usable directly as a virtual
     169:  * address.
     170:  *
     171:  * If the area you are trying to map is a PCI BAR you should have a
     172:  * look at pci_iomap().
     173:  */
     174: extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
     175: extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
     176: extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
     177:                 unsigned long prot_val);
     178: 
     179: /*
     180:  * The default ioremap() behavior is non-cached:
     181:  */
     182: static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
     183: {
     184:     return ioremap_nocache(offset, size);
     185: }
     186: 
     187: extern void iounmap(volatile void __iomem *addr);
     188: 
     189: extern void set_iounmap_nonlazy(void);
     190: 
     191: #ifdef __KERNEL__
     192: 
     193: #include <asm-generic/iomap.h>
     194: 
     195: #include <linux/vmalloc.h>
     196: 
     197: /*
     198:  * Convert a virtual cached pointer to an uncached pointer
     199:  */
     200: #define xlate_dev_kmem_ptr(p)    p
     201: 
     202: static inline void
     203: memset_io(volatile void __iomem *addr, unsigned char val, size_t count)
     204: {
     205:     memset((void __force *)addr, val, count);
     206: }
     207: 
     208: static inline void
     209: memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count)
     210: {
     211:     memcpy(dst, (const void __force *)src, count);
     212: }
     213: 
     214: static inline void
     215: memcpy_toio(volatile void __iomem *dst, const void *src, size_t count)
     216: {
     217:     memcpy((void __force *)dst, src, count);
     218: }
     219: 
     220: /*
     221:  * ISA space is 'always mapped' on a typical x86 system, no need to
     222:  * explicitly ioremap() it. The fact that the ISA IO space is mapped
     223:  * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
     224:  * are physical addresses. The following constant pointer can be
     225:  * used as the IO-area pointer (it can be iounmapped as well, so the
     226:  * analogy with PCI is quite large):
     227:  */
     228: #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
     229: 
     230: /*
     231:  *    Cache management
     232:  *
     233:  *    This needed for two cases
     234:  *    1. Out of order aware processors
     235:  *    2. Accidentally out of order processors (PPro errata #51)
     236:  */
     237: 
     238: static inline void flush_write_buffers(void)
     239: {
     240: #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
     241:     asm volatile("lock; addl $0,0(%%esp)": : :"memory");
     242: #endif
     243: }
     244: 
     245: #endif /* __KERNEL__ */
     246: 
     247: extern void native_io_delay(void);
     248: 
     249: extern int io_delay_type;
     250: extern void io_delay_init(void);
     251: 
     252: #if defined(CONFIG_PARAVIRT)
     253: #include <asm/paravirt.h>
     254: #else
     255: 
     256: static inline void slow_down_io(void)
     257: {
     258:     native_io_delay();
     259: #ifdef REALLY_SLOW_IO
     260:     native_io_delay();
     261:     native_io_delay();
     262:     native_io_delay();
     263: #endif
     264: }
     265: 
     266: #endif
     267: 
     268: #define BUILDIO(bwl, bw, type)                        \
     269: static inline void out##bwl(unsigned type value, int port)        \
     270: {                                    \
     271:     asm volatile("out" #bwl " %" #bw "0, %w1"            \
     272:              : : "a"(value), "Nd"(port));            \
     273: }                                    \
     274:                                     \
     275: static inline unsigned type in##bwl(int port)                \
     276: {                                    \
     277:     unsigned type value;                        \
     278:     asm volatile("in" #bwl " %w1, %" #bw "0"            \
     279:              : "=a"(value) : "Nd"(port));            \
     280:     return value;                            \
     281: }                                    \
     282:                                     \
     283: static inline void out##bwl##_p(unsigned type value, int port)        \
     284: {                                    \
     285:     out##bwl(value, port);                        \
     286:     slow_down_io();                            \
     287: }                                    \
     288:                                     \
     289: static inline unsigned type in##bwl##_p(int port)            \
     290: {                                    \
     291:     unsigned type value = in##bwl(port);                \
     292:     slow_down_io();                            \
     293:     return value;                            \
     294: }                                    \
     295:                                     \
     296: static inline void outs##bwl(int port, const void *addr, unsigned long count) \
     297: {                                    \
     298:     asm volatile("rep; outs" #bwl                    \
     299:              : "+S"(addr), "+c"(count) : "d"(port));        \
     300: }                                    \
     301:                                     \
     302: static inline void ins##bwl(int port, void *addr, unsigned long count)    \
     303: {                                    \
     304:     asm volatile("rep; ins" #bwl                    \
     305:              : "+D"(addr), "+c"(count) : "d"(port));        \
     306: }
     307: 
     308: BUILDIO(b, b, char)
     309: BUILDIO(w, w, short)
     310: BUILDIO(l, , int)
     311: 
     312: extern void *xlate_dev_mem_ptr(unsigned long phys);
     313: extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
     314: 
     315: extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
     316:                 unsigned long prot_val);
     317: extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
     318: 
     319: /*
     320:  * early_ioremap() and early_iounmap() are for temporary early boot-time
     321:  * mappings, before the real ioremap() is functional.
     322:  * A boot-time mapping is currently limited to at most 16 pages.
     323:  */
     324: extern void early_ioremap_init(void);
     325: extern void early_ioremap_reset(void);
     326: extern void __iomem *early_ioremap(resource_size_t phys_addr,
     327:                    unsigned long size);
     328: extern void __iomem *early_memremap(resource_size_t phys_addr,
     329:                     unsigned long size);
     330: extern void early_iounmap(void __iomem *addr, unsigned long size);
     331: extern void fixup_early_ioremap(void);
     332: extern bool is_early_ioremap_ptep(pte_t *ptep);
     333: 
     334: #ifdef CONFIG_XEN
     335: #include <xen/xen.h>
     336: struct bio_vec;
     337: 
     338: extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
     339:                       const struct bio_vec *vec2);
     340: 
     341: #define BIOVEC_PHYS_MERGEABLE(vec1, vec2)                \
     342:     (__BIOVEC_PHYS_MERGEABLE(vec1, vec2) &&                \
     343:      (!xen_domain() || xen_biovec_phys_mergeable(vec1, vec2)))
     344: #endif    /* CONFIG_XEN */
     345: 
     346: #define IO_SPACE_LIMIT 0xffff
     347: 
     348: #ifdef CONFIG_MTRR
     349: extern int __must_check arch_phys_wc_add(unsigned long base,
     350:                      unsigned long size);
     351: extern void arch_phys_wc_del(int handle);
     352: #define arch_phys_wc_add arch_phys_wc_add
     353: #endif
     354: 
     355: #endif /* _ASM_X86_IO_H */
     356: